Algebraic Technique for Efficient Hardware Synthesis of Linear Digital Signal Processing Systems

Portable embedded system applications involving image, video or speech processing regularly perform linear computations. Linear computations (e.g. discrete cosine transform (DCT), discrete Fourier transforms (DFT) and filtering operations) are often implemented in custom hardware to meet the constraints on performance and power consumption. These linear computations consist of a number of multiplications with constants, which can be efficiently implemented in hardware as a series of shifts and additions. Finding common subexpressions among these set of additions reduces the number of operations, which reduces the area and power consumption of these devices. Conventional techniques for common subexpression elimination are based on finding common digit patterns in the set of constants multiplying a single variable and are unable to fully optimize linear computations involving multiple variables such as the ones found in the direct form Finite Impulse Response (FIR) filters and DCT, and DFT. In this paper, we present an algebraic technique that can find common subexpressions in linear computations involving any number of variables. Experimental results show that our technique gives the least number of additions/subtractions compared to conventional techniques. Furthermore, we show that our optimizations give a significant improvement in the area and power consumption of these linear computations.